1. Field of the Invention
The present invention relates generally to a semiconductor device that includes sub word line drivers.
2. Description of the Related Art
FIG. 1 is a schematic diagram of a conventional word line driver. The word line driver 100 comprises a main word line driver 10, and eight sub-word line drivers 12 to 14. Each of the sub-word line drivers 12 to 14 comprises a PMOS transistor P1 and a NMOS transistor N1.
The sub-word line drivers 12 to 14 are controlled by one main word line MWL. When a memory operates in an active mode, the main word line MWL is selected as a logic low level, and the source of the PMOS transistor P1 is supplied with a boosting voltage VH. Therefore, the PMOS transistor P1 is turned on and the NMOS transistor N1 is turned off, which pulls the sub word line SWL up to a logic high level (a VH level).
When the memory operates in a precharge mode, the main word line MWL is not selected as a logic high level, and the source of the PMOS transistor P1 is supplied with a ground voltage GND. Therefore, the PMOS transistor P1 is turned off and the NMOS transistor N1 is turned on, which pulls the sub word line SWL down to a logic low level. In this condition, the PMOS transistor P1 experiences a relatively significant gate-to-source voltage, and a gate-induced diode leakage (GIDL) current is generated in this period. Although the GIDL current is not serious at the time of general operation, it is not negligible in the operation mode (e.g., a precharge mode or a standby mode) in which low power consumption is required.